Question Altera Cyclone IV Internal Memory - ROM: 1-Port Problem

Adrian

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Hi,

I have created a MIF file containing 100 x 16bit values. The values point to a colour palette which contains the RGB values for 10 colours.

In Quartus Prime Lite I have used the IP Catalogue to create a ROM: 1-Port file

My top Verilog HDL file references the ROM file which when compiled / simulated on the FPGA development board should produce a 10 coloured stripped square (10 x 10 pixels) on the attached monitor. However, all I get is a blue square.

Could you please help me with where my code is going wrong. After I compile the design the total memory bits states 4 / 423,936 ( < 1 % ), which I believe is not right for the size of the data I am trying to place in the ROM memory.

I have attached the files for my design (in .txt format). Please ignore the 640x480 file name references, it should actually be 800x600
 

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